Figure 1. Schematic of a current mirror

## 1. Lab goals

Topics
• Transistor operation modes: active, saturation, cutoff. Identifying these modes by observation of waveforms.

• Quickly building and measuring small transistor circuits with no wiring errors.

Each of the two lab sections are doing different activities.

Your task is to learn about the concepts using Figure 1, “Schematic of a current mirror” as your example and describe your findings to your classmates who did the other activity. The focus topics are similar between the two sections, however. This allows everyone several angles by which to learn the concepts. A secondary goal is to increase your technical communication / teaching skills through action.

## 2. Activities

Begin with the circuit of Figure 1, “Schematic of a current mirror” for your analysis.

Set source `Vs` to zero (replace with a wire to the ground node, or set the waveform generator to output 0 V DC).

For the moment, ignore the base currents of `Q1` and `Q2` (set to zero, analyze using the model of npn hand model - no base current).

• Find the voltages at nodes X and B (B is not 0V).

• What is the emitter current of `Q1`?

With this information:

• What is your estimate of the voltage across `R2`?

We want the emitter current of `Q2` to be 10× larger than that of `Q1`.

• What should be the value of `R2` then? Choose a value that is in stock.[1]

→ Build this circuit and verify (measure!) that the emitter current of `Q2` is approximately 10× larger than `Q1`.

### 2.1. Current mirror operation

Now, setup the oscilloscope or AD2's function generator output as source Vs. Use a 2 V peak-to-peak triangle function centered around 0 V.

Use channel 1 to view the node voltage at B (between B and zero) and channel 2 to view node voltage out.

Now, increase the input signal amplitude until the output voltage starts to have some “issues”. Set the amplitude to 10 V peak-to-peak.

• Your task is to figure out why the output looks the way it does!

You will have about 1/3 of class time on Monday to explain to someone from the other section the following items:

1. What your circuit was and your procedure plus reasoning for choosing your value of `R2` and evidence that your prediction and measurements were close.

2. Why the output waveform clips and what aspects of the circuit and transistor behavior make this so, especially the fact that you can predict by the schematic what voltage the output node will clip at.

Then you should make and bring a short document to class to assist you in this task.

Circuit notes

A mirror is so named because the collector current of the output transistor, `Q2` here, tracks the current through the input / control transistor `Q1`. Having the bases tied together has the effect of keeping the emitter voltages nearly the same. Control transistor `Q1` is diode-connected (base-collector shorted) and makes finding the control branch’s current relatively easy.

A simpler mirror omits the emitter resistors. In this case, the cause-effect relationship is that a current forced into `Q1` sets up a certain VBE. This voltage is applied to `Q2`’s VBE and causes an output collector current. If the two transistors are matched (have the same parameters and are at the same temperature), `Q2`’s collector current will be the same as `Q1`’s collector current. Hence the output current is a copy or mirror of the input current.

When both control and output branches have emitter resistors, the mirror action is also apparent.

## References

1. The GEM 163 storage cabinet has every E12 series value from 1 Ω to 10 MΩ