2022-01-14

1. Setup

1.1. Install ATTinyCore package for Arduino IDE

This package includes all of the configuration needed for programming the ATtiny85 and others in the ATtiny series using the Arduino IDE platform and framework.

GitHub repository: https://github.com/SpenceKonde/ATTinyCore

Add the following to your File -> Preferences -> Additional Boards Manager URLs list:

  • http://drazzy.com/package_drazzy.com_index.json

Then under Tools -> Board, select the ATtiny25/45/85 (no bootloader) option.

Set the Clock source to 8 MHz (internal), then Burn Bootloader.

1.2. hypothes.is for annotations

You can annotate anything on the web without installing the extension by adding https://via.hypothes.is/ in front of the URL

Open datasheets:

2. Tasks

  • Trace how an AVR core architecture microcontroller starts up and begins executing instructions

PDF print pages datasheet

  • 4 overall architecture. highlight memory (flash, SRAM, EEPROM)

  • 7-9 AVR CPU core. highlight memories again

    • Harvard architecture definition

      • CompArch: 2-stage pipeline

    • instruction bits → (SRAM / Registers) links

      • direct vs indirect addressing differences

    • how can you talk to (R/W) the EEPROM?

    • Status Register

      • Important CPU operation and ALU result bits

      • Real source of branch instruction decisions!

  • (page 12) - Reset handling

    • "Program Counter is vectored to the actual Interrupt Vector …​"

  • 15-16 AVR Memories

    • Recall Harvard architecture and separate program/data address spaces

    • Each Program (flash) address refers to -bit entities

    • Each Data memory address refers to -bit entities

      • 32 CPU registers

      • 64 I/O registers

      • general purpose SRAM

Done with an architectural tour.

What happens with the "Program Counter is vectored to the actual Interrupt Vector …​" thing?

  • (page 39) Chapter 8 - System Control and Reset

    • lots of ways to cause an internal reset

    • timing examples on next few pages

Top of the page:

… and the program starts execution from the Reset Vector. The instruction placed at the Reset Vector must be a RJMP — Relative Jump — instruction to the reset handling routine.

Where is the Reset Vector?

  • Table 9-1 on page 48

Summary:

After (internal) RESET, the CPU executes the instruction located at 0x0000 in Program Flash. Docs say it must be an RJMP instruction.

Switch to the AVR Instruction Set Manual, then search for RJMP.

16-bit Opcode is 1100 kkkk kkkk kkkk

  • Program a blink program to your ATtiny

  • Sketch -> Export compiled Binary

  • Find these files and open them with Notepad++

Look at .lst file.

Figure out the format and find what is compiled to and placed at Flash address 0x0000 .