ECE424 day09

Announcements

hw06 due today
pcb1 due Friday. Book Appendix B has logic references
hw07 due Monday

The zyBook gives the option to "Print Chapter." Do this for each chapter to end up with a copy of the textbook You have paid for the content, take advantage of the offer!

Class time

Two simple CPUs:

J1

https://www.excamera.com/sphinx/fpga-j1.html

https://github.com/jamesbowman/j1

https://github.com/howerj/forth-cpu

https://www.fpgarelated.com/showarticle/790.php

https://nanode0000.wordpress.com/2017/04/08/exploring-the-j1-instruction-set-and-architecture/

MCPU

https://github.com/cpldcpu/MCPU

How does use of memory compare to MIPS?

Instruction encoding

Selection of instructions

Different design goals

Data path discussion. Eventually everyone will build a MIPS32 datapath, these are small examples.

hw07

Compare and contrast the J1, MCPU, and MIPS architectures. It may be helpful to also read the Verilog/VHDL implementations.

Please include discussion of each of the following subjects:

Include a sentence introducing each architecture of the form: "The X is a Y-bit architecture, meaning that it uses Y bits for …"
How does each CPU interact with memory?
Compare the instruction encoding schemes. (formats, positions, etc.)
Each document describes its own design decisions (some, the rest are implied in the HDL). Compare / contrast / notice how these decisions affect the implementation and structure between the architectures.

Submission

Write up this discussion as a memo that you would send to a manager summarizing and documenting your research results.