1. pcb5 and pcb6
Soldering may take a while, allow time for potential bodges if everything doesn’t work correctly immediately.
Test vectors and expected results:

3. Final exam
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All things are due by 12:30pm Thursday, December 16
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Some questions about the architecture of computers
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not obscure information to memorize
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MIPS asm to machine code
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Data path for MIPS
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What is the role of register PC?
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How many RAM units does this architecture imply for both the single-cycle and the pipelined versions?
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Pipeline ideas
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Why?
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When would pipelining be a net loss in X metric of performance?
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That question threatened to be on the final exam.
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What is a hazard?
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When does "forwarding" work? How many clock cycles does it save?
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When does forwarding NOT work?
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If in doubt … stall.
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Hint about optimizing branch lengths and statistics.
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Memory
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virtual memory is a thing, but maybe 0, or 1 question
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cache
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sets, blocks, words, valid, tag, associativity
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how many bits
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if a cache holds N words, which arrangement requires the fewest SRAM bits?
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MCPU question in context of above ideas/questions.