All you need to know about CMOS (logic) circuits come from the humble static CMOS inverter.
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inverter DC transfer function
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transistor sizing and models
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"switch voltage" not really a thing
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noise margins, VIL and VIH and VOL and VOH
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simulation with {LTspice, CircuitLab} intro
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concept: regenerative or restorative logic
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FET capacitances
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sinking/sourcing current
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transistor ON resistance
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drive strength
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fan out
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inverter gate delay
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power consumption
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static, leakage
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dynamic, shoot-through
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load drive power
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sizing for:
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min-delay
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min-energy
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energy/power-delay-product
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Delays in logic circuits, multiple gate tree
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RC-delay estimate
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Elmore delay
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Logical Effort technique
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