(this document will grow and turn into the official specifications as the project progresses)

1. Introduction

This is a whole-class project whose end goal is to implement the [MCPU] in the ON Semiconductor’s [C5] 0.5μm CMOS process through [MOSIS].

1.1. MCPU

The MCPU is an 8-bit CPU that was originally designed to fit into a 32 macrocell CPLD. It has two registers, a program counter PC and an accumulator A (variously named akku or Accu depending on the document). Each of the four instructions is one 8-bit word wide and encoded as a 2-bit opcode with a 6-bit address/immediate field.

References