1. Submission process

  • Scan your handwritten work portion into a single PDF document. The pages should be re-scaled, rotated, and in high contrast, see the following Doc for how to do this. An un-processed photo will not be accepted for grading.
    howto create PDF files and submit them on Blackboard

  • Create a single document with the results of your simulation. Include: your schematic, relevant plot(s), and measurements.
    howto Save LTspice schematics and plots

    • Export this as a PDF and attach to your assignment.

    • Attach your .asc LTspice schematic file.

2. Information

See the first part of book chapter 4 for timing parameter definitions.

Sequential circuits introduction: Timing definitions
also has a growing number of figures the graphically illustrate various timing definitions.

3. Schematics for NOR3 gate

Start with the book’s example of a 3-input NAND gate in Figure 4.7 and Example 4.2 (p. 147-148).

Re-do that example for a 3-input NOR gate. Remember, the transistor widths are scaled by the factor written next to the channel in order to keep the same (DC) equivalent resistance of the ON paths the same. Use the same prototype invertersizing as the example which uses a 1-unit width nMOS and a 2-unit width pMOS (implying a μn/μp electron / hole mobility ratio of about 2).

  • Draw three 5 schematics in the same progression as Figure 4.7 a—​e. Draw this series of schematics over at least 2 pages — prefer legibility-after-scanning over saving paper.

  • Why does Figure 4.7 (b) include only a 3C value capacitor at each of the two internal nMOS S-D nodes instead of 6C capacitors to account for the fact that there are two sources/drains connected?

4. RC network responses

vlsi rc delays
Figure 1. RC networks

4.1. Hand Calculations

  • Find the propagation delay in picoseconds \(t_{pdr}\) (in ECE 340 this was named \(t_{pLH}\)) of Figure 1, “RC networks” (a) using the circuit equations. There will still be a \((\ln 2)\) factor in your math, we are not dropping it yet like the book’s equation (4.9) does.

    • Sketch the waveforms at Vin and outA

  • Find the propagation delay in picoseconds \(t_{pdr}\) of Figure 1, “RC networks” (b) by using a similar technique as book section 4.3.4 and equation (4.13) to approximate as a single time constant system. This is the Elmore delay.

4.2. Simulations

Simulate the transient response of the two networks of Figure 1, “RC networks” using LTspice. Be sure the input waveform’s rise time is less than 1/10th of the output’s rise time.

  • Find the propagation delay \(t_{pdr}\) of Figure 1, “RC networks” (a). This should be exactly the same as your calculated value.

  • Find the propagation delay \(t_{pdr}\) of Figure 1, “RC networks” (b). Compare this to your Elmore-estimated value. Do you think it will always be an over/under estimate?