1. Introduction

Operational amplifiers have two (differential) input nodes but have a single output pin. Therefore, at some point in the signal flow through the circuit there needs to be a conversion between differential to single-ended functional quantities. The fully-differential amplifier has differential inputs and differential outputs and is not covered here.

  • A signal is single-ended when it’s voltage (or current) is measured with respect to the circuit common reference (commonly called ground).

  • Differential quantities are measured as the difference between two node voltages or branch currents, neither of which includes the circuit common node.

Typically, the differential to single-ended conversion takes place in the first stage of an opamp. The differential input signal is applied to the bases (or gates) of a differential pair of transistors. Other names for the structure is the emitter/source-coupled pair, or long-tailed pair.

Before we look at the small-signal analysis of the differential pair, we need to first look at some concepts that will help simplify the models.

1.1. Differential signal transmission

Differential signaling uses a pair of wires to send signals between circuits, especially when they are widely separated. Implied in this system is a third node that is common to both the sender and receiver. It makes it possible to remove several types of noise and interference added to the signal along its path from transmitter to receiver. USB and wired Ethernet connections are common examples of differential signaling in practice.

The desired signal is applied as the difference between the two wires and, ideally, the noise voltages/currents are added equally and in-phase to each conductor of the pair. The receiver simply takes the difference of the pair as the signal quantity, therefore removing all of the noise.

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Figure 1. Differential signal transmission.

There are 3 nodes that participate in a differential pair of signals: a common reference defined at the receiver’s end of the circuit, and the two signal nodes A and B (or [+in and -in], or [inp and inm]) The node voltages Va and Vb (measured with respect to the circuit’s reference node) completely describe the values.

However, it is much more useful to define another set of quantities:

\[\begin{cases} \begin{aligned} v_D &= v_A - v_B \\ v_{CM} &= (v_A + v_B) / 2 \end{aligned} \end{cases}\]

Given the set of differential and common-mode voltages for a pair of nodes, it is a small matter of algebra to know the individual node voltages:

\[\begin{cases} \begin{aligned} v_A &= v_{CM} + v_D / 2 \\ v_B &= v_{CM} - v_D / 2 \\ \end{aligned} \end{cases}\]

See Figure 2 for a graphical version of these conversion equations.

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Figure 2. Two ways of specifying the voltage at a pair of nodes, red and blue sets.
Some additional points to remember

  • In any “coordinate system” for these quantities, two terms are required to completely specify the potentials at the two nodes.

  • The equations use terms in lowerUPPER notation, the total or physical quantity, to emphasize that these two systems are always valid. This means they are also separately valid for DC quanitities (UPPERUPPER notation), for small-signal quantities (lowerlower), and for phasor quantities (UPPERlower).

This video discusses a few ways to apply \(\left\{D, CM\right\}\) signals in the context of a circuit simulator.

1.1.1. Additional resources about differential signals

The Why and How of Differential Signaling by Carsten Pinkle for All About Circuits.

1.2. Half-circuit models

For differential circuits, the voltages at two input nodes (A and B, referred to the local common reference node) can be referred to in two main ways. The obvious one is just the node voltages, \(V(A)\) and \(V(B)\). Much more useful is to view the nodes as a pair and consider their voltage difference \(v_D = V(A,B)\) and their average \(v_{CM} = \frac{V(A) + V(B)}{2}\).

There are some nice simplifications that can happen when changing into the \(\left\{D, CM\right\}\) coordinate system. When considering an input that is solely differential or solely common-mode, the circuit can be split in half with a few value changes and analyzed for gain and other parameters. The results of this half-analysis are the same as from the full circuit.

1.2.1. Common-mode half-circuit

If a differential circuit’s two inputs are the same, we say the input is pure common-mode, (\(v_D=0\)). With a small modification, we can view the stage as a (single transistor) common-emitter stage and readily calculate the single-ended common-mode gain \(v_{out} / v_{inCM}\). For a differential output and total symmetry, the common-mode gain is ideally zero.

This series of videos walks through constructing a common-mode half-circuit for a simple resistor-loaded and biased differential pair. Part 1 reviews the conversion between measurement views of the input quantities. Part 2 constructs the common-mode half-circuit and discusses input voltage ranges. Part 3 views a differential input to single-ended output as a cascade of two amplifiers instead as a diff-pair.

This video is another review of the common-mode half-circuit:

1.2.2. Differential-mode half-circuit

In a similar manner as the common-mode circuit, the differential-mode half-circuit can simplify analysis by exploiting the symmetries in the system when there is pure differential-mode input. This video derives a differential-mode half-circuit for a simple diff-pair circuit:

The idea of a node whose voltage doesn’t change becoming effectively a small-signal ground node gets introduced in the differential half-circuit and is developed more in the next section.

2. Virtual ground

For a pure small-signal differential input, \(v_d\), the voltage at the diff-pair’s coupled emitter node doesn’t change.[1] According to the following analysis, this “tail” node behaves like a virtual ground — a similar concept happens at the \(-in\) node of an inverting operational amplifier circuit.

See the handwritten notes for the full development of this concept and analysis tool with a pnp input pair.

diff-pair-virtual-ground.pdf

2.1. Tasks

Read the above notes and then complete the following tasks:

  • Begin with an npn differential pair instead and show that you arrive at the same result (virtual ground at node e) as the notes.

  • Verify the assumption on the first page that including \(r_{o}\) in the small-signal transistor model does not change the result. Use \(R_1\!==\!R_2\).

3. Differential to single-ended conversion

3.1. Resistor loading

A simple way of converting a differential input signal to a single-ended quantity is to apply the input to a differential pair and take the output at just one of the collectors of the pair. The following document walks through the small-signal analysis of this situation with a pnp input pair.

diff-to-single-ended-resistors.pdf

3.1.1. Task

  • Using the above notes as a guide, find the equivalent Norton equivalent model of the input stage of a resistively-loaded npn input pair. Show that the result has exactly the same input resistance, output resistance, and transconductance \(G_m\) as the pnp-based stage.

3.2. Current mirror load

The factor of \(1/2\) in the \(G_m\) for the resistive loading hints at a potential gain in transconductance efficiency — the ratio of transconductance to the DC bias current of the transistor (or stage). For the resistor-loaded differential pair:

\[\begin{align} \dfrac{G_m}{I_{bias}} &= \dfrac{g_{m1,2}/2}{I_{tail}}\\ &= \dfrac{I_{C1,2}}{2 V_T I_{tail}}\\ &= \dfrac{I_{tail}}{2 \cdot 2 V_T I_{tail}}\\ &= \dfrac{1}{4 V_T} \end{align}\]

Notice how half of the signal current is effectively thrown away from Q2 since that half of the cirucuit has no effect on the single-ended output? If only there was a way to capture that current and add it to the signal current from Q1.

Replacing the collector resistors with a current mirror provides several benefits.

  • Mirror action forces the pair’s collector currents to be nearly equal at all times and therefore \~always equal to \(I_{tail}/2\).

  • If the tail current is provided by a current source instead of a resistor, there is nearly no variation in collector currents and therefore nearly no output change when the common-mode voltage changes.

  • Changes in the differential signal-related current through Q2 are mirrored to the collector current of Q3, whose current adds to the signal current through Q1. Remember that an increase in one input has a corresponding decrease at the other input. It is this extra sign change that results in the addition instead of subtraction at the out node.

The following document shows the small-signal mode of a current-mirror load with a pnp input pair.

diff-to-single-ended-mirror.pdf

3.2.1. Tasks

  • Show that an npn input pair version of the circuit yields exactly the same small-signal model as the pnp input used in diff-to-single-ended-mirror.pdf. List every assumption that is needed to end up with the approximate model at the end of the page.

  • What is the transconductance efficiency of the current mirror loaded stage?

3.3. More on gm efficiency

It is clear that the gm efficiency of a circuit using bipolar transistors is solely a function of temperature and therefore it’s not a (usual) quantity under control of the circuit designer. This is not the case for MOSFETs, where the ratio \(g_m / I_D\) depends on the inversion coefficient.

This technique is so important for (analog) CMOS circuit design that several books cover the topic.

A good summary discussion of a MOSFET’s transconductance in strong (above threshold) and weak inversion (subthreshold) modes can be found in these slides: Subthreshold Operation and gm/Id Design by Micahel Perrot.

1. This is not true in general when the input difference \(v_D\) is larger than \(|V_T|\) or so.