After the differential to single-ended conversion in the first stage, the second stage provides the bulk of the signal voltage gain.

In the previous batch of notes, "Opamp diff-pair input stage", we explored how the details of the collector circuit affect the Norton-equivalent model of the differential pair. Through the virtual ground concept, we also saw that the details of the tail current (resistor or current source) have no effect on the model for pure differential inputs. The behavior of the front-end with common-mode input will be considered separately.[1]

1. Common-emitter gain stage

This stage is nearly always built around a common-emitter (BJT) or common-source (MOSFET) structure. These types of amplifiers have large voltage gain potential and moderate input impedance. Another observation is that the transistor type is opposite that of the differential pair. A pnp input stage will be followed by an npn common-emitter amplifier and an npn input amplifier will use a pnp gain stage.

The factor determining which transistor types to use are usually set by performance goals such as common-mode input range and the relative performance of n- and p-type transistors available in the chip fabrication process. Clearly, an opamp built from discrete parts is not limited by a single fabrication process' capability, though it will have issues of its own related to matching, parasitic inductance, and capacitance.

In Figure 1, the gain stage consists of common-emitter Q6 and a current mirror load implemented with Q7. Capacitor Cc is, at minimum, the base-collector junction capacitance of Q6, frequently labeled \(C_\mu\) in the high-frequency hybrid-π transistor model. We will see shortly that the designer will add another small capacitor in this position to help the amplifier remain stable when it is used in a circuit with negative feedback.

ndiff
Figure 1. Opamp circuit with npn input stage
ndiff
Figure 2. Opamp circuit with pnp input stage

For these example circuits, the small-signal input impedance of the second stage is just \(r_{\pi 6}\), which can be low for a bipolar transistor using a large bias current. Sometimes, an emitter-follower stage is inserted in front of Q6 to increase the input resistance of the stage by a factor of β (see an EF’s Zi in Tourbook Table: Bipolar single-transistor amplifier types).

Examples of an emitter-follower buffer between the input pair and gain stage:

  • LF411 (pdf) page 10. Q4 is the buffer and Q5 is the common-emitter transistor.

  • LM324 (pdf) page 10. This has two cascaded common-emitters, a pnp then an npn follower driving the npn common-emitter. The double npn structure is very similar to a Darlington transistor pair. The LM324 also uses emitter-followers driving the input differential pair, which both reduces the input bias current and allowing the input voltage range to extend all the way to the negative power supply.

  • NJM4560 (pdf) page 1.

  • TL972 (pdf) page 9.

Simple discrete opamps will occasionally use a collector resistor in place of the current source load. Such a simplification, unfortunately, carries little benefit at the expense of much greater sensitivity to power supply noise, lower gain, and common-mode distortion.

2. Small-signal analysis

Why ignore the third stage?

The third stage of an opamp is a voltage buffer to lower the output impedance of the circuit.[2] An emitter follower stage, or a complementary follower stage is typical. This is represented by the EF transistor Q8 and associated current source biasing via Q9 in Figure 1 and Figure 2.

Since this third stage has approximately unity gain, it is not always useful to include it in our simple small-signal analysis.

The increasingly important category of rail-to-rail output stages use complementary common-emitter (or common-drain for CMOS) structures, similar to a huge static CMOS inverter. This adds another signal inversion and introduces a different set of stability and output impedance characteristics. Most of the time, with a modern device, these differences are not a problem unless you are approaching performance limits.

Pages 1—​3 of the following document analyze the Figure 1 circuit’s first two stages when driven by a pure differential input.

discrete-opamp-ss-analysis.pdf

  • Open that document and follow it to Sch 3 on the second page.

Sch 3 on the second page of discrete-opamp-ss-analysis.pdf includes the net effect of capacitances between the two main nodes in the structure. Capacitors C1, C2, are from the transistor diffusion and junction capacitances. Cc is slightly larger than the Cc part value since it is also in parallel with the base-collector junction capacitance of the gain transistor.

opamp model
Figure 3. Opamp small-signal model

Figure 3 is the same as Sch 3 in the PDF notes.

  • Continue following the linear circuit analysis in those notes to to arrive at the transfer function \(v_{out} / v_{id}\) for a differential input signal.

This transfer function has:

  • Two poles.

  • Two zeros.

\[\dfrac{v_{out}}{v_{in}} = \dfrac{G_{m1} \left(G_{m2} - s C_c\right) R_1 R_2}{1 + s\left[C_1 R_1 + C_2 R_2 + C_c\left(G_{m2} R_1 R_2 + R_1 + R_2\right)\right] + s^2\left[C_1 C_2 + C_c\left(C_1 + C_2\right)\right] R_1 R_2}\]

As in the PDF, the denominator of this transfer function has two poles, which can be factored into its two roots:

\[\begin{align} D(s) &= \left(1 + \frac{s}{\omega_{p1}}\right) \left(1 + \frac{s}{\omega_{p2}}\right) \\ &= 1 + s \left(\frac{1}{\omega_{p1}} + \frac{1}{\omega_{p1}}\right) + s^2 \left(\frac{1}{\omega_{p1} \omega_{p2}}\right) \end{align}\]

  • Carefully follow the approximations to this transfer function that start on page 4.

  • Continue the notes through the end on page 8.

One of the approximations removes the “flying” capacitor \(C_c\) from between nodes 2 and 4 and replaces it with an effective capacitance between node 2 and common ⏚ that is larger by a factor equal to the second stage’s voltage gain. This is called Miller effect and is an important result. Read more at Wikipedia: Miller effect. If you are looking for something different, this Miller Effect derivation video shows that the apparent impedance transformation result works for positive or negative gains. Note that the value in the PDF notes, \(C_c (1 + A_{v2})\), uses a gain value \(A_{v2}\) is positive even though the second stage is inverting.

Further reading

The Monolithic Operational Amplifier: A Tutorial Study by James Solomon of National Semiconductor. I highly encourage you to read this article from the beginning through section 3.0, which arrives at the same result in equation (15) as the quadruple-starred expression on page 7 of the PDF notes. It is safe to skip the (four page long) section 2.B unless you are an integrated circuit designer.

Internal and External Op-Amp Compensation: A Control-Centric Tutorial by Kent Lundberg uses the same basic opamp structure, arriving at Fig. 10 on page 3, which is the same as Figure 3. Lundberg discusses the amplifier in terms of control theory and shows some strategies for analyzing and compensating this form of amplifier structure.

Vishal Saxena's Master’s Thesis develops a compensation technique that is 2× better than previous work. This page by his adviser Jacob Baker briefly summarizes those results.

1. Separately because, in a linear model, superposition allows us to treat them as independent. This is the very definition of linearity.
2. It is really hard for me to make a statement like this. There is a danger in thinking that all opamps must have three stages. This structure is simply the most common. Some modern opamps use radically different internal structure.